MemoryXRefQ1 2026 DRAM contract
+90–95% QoQ
Largest single-quarter conventional-DRAM contract increase on record (TrendForce).
DRAM stopped behaving like a commodity. AI data centers now absorb the majority of global output, every HBM wafer erases roughly three wafers of conventional DDR, and three suppliers control ~90–95% of the market. The result is the steepest DRAM price climb on record — and a sourcing environment where availability, not unit cost, is the binding constraint. This page tracks where the market stands and what it means for memory procurement and cross-referencing equivalents.
Memory is no longer a back-of-the-bill-of-materials commodity — in 2026 it is one of the largest and fastest-growing segments in all of semiconductors, pulled by AI. The official figures are big and the aggressive ones are bigger; the gap itself tells the story of how fast pricing has moved.
WSTS official forecast for the memory category, up +39% YoY, inside a ~$975B total semiconductor market. More aggressive revisions (Omdia) see DRAM nearly doubling and put memory far higher.
DRAM is the larger, faster slice — Bank of America projects DRAM revenue +51% YoY in 2026. As a single data point, Micron alone booked ~$31B of DRAM in one quarter (May 2026).
High-bandwidth memory roughly +70% YoY (Yole), heading toward ~$170B by 2031. Technically DRAM, but it now bends the entire memory supply chain around itself.
The advanced DRAM and HBM market is a three-company oligopoly — Samsung, SK hynix and Micron together hold ~90–95%. That concentration is why allocation, not open competition, sets availability downstream.
DRAM revenue share, Q1 2026 (Counterpoint Research). Micron sits in the low-20s; Chinese suppliers (CXMT, others) ~5–10%, largely lower-end.
Market-size estimates vary widely by source and definition — from WSTS’s official ~$295B to supercycle estimates above $500B — so we show the range rather than assert a single number. Pricing and allocation move week to week; treat every figure here as a dated snapshot, not a live quote, and verify before acting.
The DDR generation breakdown of our own database skews toward DDR4 and DDR3 by part count, reflecting installed-base depth — distinct from global bit-demand, where DDR5 has already overtaken DDR4 in servers and PCs.
Conventional DRAM contract prices have risen every quarter since mid-2025, accelerating violently into 2026. A modest +10–15% in Q3 2025 became a record +90–95% in Q1 2026. And it isn’t done: in late June 2026, Jefferies forecast a further +40–50% in Q3 and +30–40% in Q4 — on top of already historic prices.
Cumulative effect of reported & forecast QoQ contract changes · Q2 2025 = 100
Index is a cumulative illustration of reported and forecast quarter-over-quarter conventional-DRAM contract changes; it is not a published price index. Inputs: Q3’25 +10–15%, Q4’25 +18–23%, Q1’26 +90–95% (TrendForce); Q2’26 +43–63% (conventional; PC DDR5 revised to +43–48% on 30 Apr 2026); Q3’26 +40–50% and Q4’26 +30–40% (Jefferies forecast, Jun 2026). Midpoints used for the curve.
Projected cumulative rise across the cycle — more than triple the ~90% climb of the 2017–18 super-cycle, on roughly 3× the revenue base.
Some suppliers are now advising customers to plan for DRAM increases of 10–20% per month through end-2026 — a measure of how little visibility the channel has.
Pricing is increasingly finalized at shipment, not at order. For smaller buyers the market has been described as moving toward “hourly pricing.”
This is a supply-allocation crisis, not a demand spike that fades. Fab capacity is finite, and the most profitable use of a DRAM wafer is now high-bandwidth memory for AI accelerators. Every wafer redirected to HBM removes a multiple of conventional DDR from the market — and new capacity cannot arrive in time to close the gap.
HBM uses roughly three times the silicon area per gigabyte of conventional DRAM. So each wafer shifted to HBM erases about 3× its equivalent in DDR5 output — the hidden mechanism pushing conventional pricing into HBM territory.
Top-8 hyperscaler capex is set to exceed $600B in 2026, up ~40% YoY. Meanwhile DRAM bit-supply growth is capped near 16% (IDC) and wafer starts are growing only ~6–8% YoY. Demand is structurally outrunning the industry’s ability to add capacity.
Memory’s share of a standard server’s bill of materials — the server has become a memory appliance.
Down from ~12 weeks in Oct 2024 — a ~66% drop. Buffers that once absorbed shocks are gone, so spot has at times topped contract prices.
Micron’s Idaho fab targets mid-2027; its New York megafabs broke ground in 2026 for output near 2030. Most new capacity is earmarked for HBM, not commodity DDR.
Industrial-grade module lead times have stretched past 30 weeks, with allocation controls meaning early orders effectively set deployment schedules.
The defining anomaly of this cycle: legacy DDR4 has, in some configurations, traded higher than newer DDR5. As the three majors reallocated wafers to DDR5, LPDDR5X and HBM, DDR4 output collapsed faster than its enormous installed-base demand — inverting the usual price hierarchy. For anyone maintaining DDR4 platforms, this is the headline risk. (Browse equivalents by DDR type and form factor.)
End-of-life products usually get cheaper as inventory clears. DRAM is the exception: production cuts shrink new supply while upgrade, RMA and warranty demand from a vast DDR4 installed base keeps chasing a smaller pool. The same pattern appeared in the DDR2→DDR3 transition, where the inversion lasted roughly four months before normalizing — so most analysts treat today’s inversion as temporary, not permanent.
The three majors split on strategy. Micron held to its exit; Samsung and SK hynix reversed course as DDR4 became an unexpected cash cow — but extended supply is earmarked for contract and industrial customers, not the open market.
Intel 6th–10th gen Core (Skylake–Comet Lake), many 11th-gen boards, and AMD pre-Ryzen 7000 systems — plus a long tail of industrial, embedded, networking and automotive designs. These fleets face upgrade and replacement risk as new DDR4 supply thins. Need a swap path? Find DDR4 equivalents.
Native DDR5 platforms — Intel 12th-gen Core and newer, AMD Ryzen 7000 and newer, Intel Xeon 4th-gen Scalable (Sapphire Rapids) and newer, AMD EPYC Genoa and newer. These ride the prioritized supply, even if pricing is still elevated. Compare DDR5 RDIMM options.
Representative module and chip prices through the run-up. Figures are point-in-time references from market surveys — by design they age quickly, which is precisely the point in an allocation-driven market.
| Item | From | To | Change | Window |
|---|---|---|---|---|
| DDR5 16GB module (avg) | $142 | $201 | +41.6% | Mar→Apr 2026 |
| DDR4 8GB module (avg) | $85 | $119 | +40.0% | Mar→Apr 2026 |
| DDR5 chip, spot reference | $6.84 | $27.20 | +298% | Sep→Dec 2025 |
| DDR5 retail, EU channel | Jul 2025 | +408% | −7.2% MoM | peak then Mar 2026 dip |
Module averages and spot chip reference: TrendForce transaction data. EU retail: 3DCenter channel tracking — an ~8-month run-up of +408% vs July 2025, then a first monthly correction of −7.2% in March 2026 concentrated in consumer/retail channels while contract prices held firm. Look up live equivalents in the cross-reference tool.
The developments shaping the memory market this year — pricing, supply, demand and the regulatory backdrop.
Downstream impact is now visible in finished goods — memory-driven price increases have been announced across PCs, consoles and graphics cards as OEMs pass through higher BOM costs.
Because HBM is sold out for 2026 and commands the best margins, leadership in high-bandwidth memory effectively dictates who controls the most valuable wafers — and therefore how much conventional DDR everyone else can get.
SK hynix leads HBM with roughly 57–62% of shipments, and UBS projects it could take ~70% of HBM4 supply for NVIDIA’s Rubin platform. Samsung is recovering via HBM3E/HBM4; Micron is expanding aggressively. Full-year 2026 HBM volume and pricing are reported effectively locked.
HBM4 doubles its I/O count from 1,024 to 2,048 and carries a manufacturing-complexity premium of 30%+. Every gigabyte of it consumes far more wafer area and advanced-packaging capacity than mainstream DDR — so HBM growth of ~70% YoY directly compresses the supply of DDR5 RDIMMs and everything below them.
In an allocation market, the playbook changes. Price is no longer the variable you optimize first — securing supply is. The buyers who fare best treat memory as a managed, declining asset and bring credible, firm demand to the table.
Forecasters broadly agree prices keep climbing into a Q3–Q4 2026 peak, with meaningful relief no earlier than late 2027 — and some, like Jefferies, see increases of 40–45% continuing into 2027. The spread between scenarios is driven almost entirely by one variable: whether AI infrastructure spending moderates or keeps HBM prioritized over commodity DRAM.
AI demand moderates faster than expected; Q3 2026 relief accelerates into Q4 2026 normalization as wafer mix shifts back toward conventional DRAM.
Relief: Q4 2026Peak in Q3–Q4 2026; declines begin and continue through H1 2027 as volumes rise ~20%+. The consensus path across TrendForce, IDC and others.
Normalize: Q1–Q2 2027Sustained AI buildout keeps HBM prioritized; tightness and elevated pricing persist into 2028. Intel’s CEO has publicly said “no relief until 2028.”
Relief: 2028“Normalize” means a return to pre-shortage pricing trends, not the absolute lows of 2024–2025. The industry has structurally repriced; the cheap-memory era of mid-2025 is unlikely to return. Micron itself expects demand to outpace supply past 2027.
Find qualified, cross-referenced equivalents across 17 manufacturers — by part number, specification or form factor — and keep your build shipping.
Figures are drawn from primary market trackers, analyst houses and supplier disclosures published Q1–Q2 2026. Where forecasts differ, ranges are shown. This page is a snapshot of a fast-moving market — verify current numbers before acting on pricing or allocation decisions.
Method: the contract-price index is a cumulative illustration derived from publicly reported and forecast quarter-over-quarter conventional-DRAM contract changes (baseline Q2 2025 = 100); it is not a published index, and the Q3–Q4 2026 segment reflects Jefferies’ forecast rather than realized prices. Module and chip prices are point-in-time market references and will not reflect live quotes. Market-size figures vary by source and definition; ranges are shown deliberately. Nothing here is procurement, investment or financial advice.